Term
which configuration best describes the execution units of the P4 architecture |
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Definition
2 float point units, 3 intenger units, 2 memory units |
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Term
What characteristic of the Penium architcture provides the biggest improvement over its predecessor chips? |
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Definition
instruction level parallelism |
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Term
In order to guarantee that a function is in-lined, we should set the visual studio flag |
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Definition
no flag guarantess in-lining |
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Term
Memory using (SSE< SSE2, SSE3, SSE4) instructions should be aligned on what voundary for best performance? |
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Definition
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Term
Of the following list, what must we determine first when optimizing a game? |
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Definition
If we are CPU or GPU bound |
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Term
What statement is not true about optimizing games today? |
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Definition
Insturction processing is relatively slower then memory fetching |
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Term
In this picture, what effect will increasing the speed on the pixel hotspot have on the frame rate? |
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Definition
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Term
Which stage of the graphics pipeline converts 3D vertex data into 2D? |
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Definition
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Term
if you've for a structure pointer named "p", how can you access the "name" member? |
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Definition
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Term
Describe why the execution stage runs faster when your code generates well blended operations of float, memory, and integer instructions |
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Definition
When you do a line of code it will throw stuff into... the correct... thing... heheh... *smiley angry face* hehehe. *fucking touching my hands for FUCKING STUPID reasons. >=( * |
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Term
Convery this array of structures and desclaration to a structure of arrays.
struct aos
{
float m_float1;
float m_float2;
}
aos myAos[32]; |
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Definition
struct myconvert
{
float m_float1[32];
float m_float2[32];
} convert; |
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Term
Descirbe the difference between the asynchronous and synchronous models used when threading an application. |
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Definition
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Term
What characteristic of hte Pentium architecture provides the biggest improvement over its predeccor chips? |
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Definition
Instruiction Level Parallelism |
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