Term
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Definition
controlled by hardware blocks to multiplex, divide,
and gate clock signals |
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Term
| Multipurpose Clock Generator (MCG) |
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Definition
internal reference clock generator
-can generate high frequency clocks using PLL or FLL |
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Term
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Definition
generates reference clock using
external
crystal or resonator |
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Term
| System Integration Module (SIM) |
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Definition
| contains many registers for selecting clock source and dividers for various module clocks |
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Term
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Definition
reference clocks are divided down to
slower clock sources for all system
functions |
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Term
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Definition
| the clock to each peripheral can explicitly be gated on or off using clock-gate control bits in the SIM (system integration module) |
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Term
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Definition
| crystal- mechanical resonator of vibrating crystal that oscillates at a set frequency |
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Term
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Definition
Electronic oscillator without mechanical components to stabilize freq
Uses less power
does not need crystal (cheaper and smaller)
less precise than crystal
initial source for many microcontrollers |
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Term
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Definition
Programmable internal electronic oscillator
allows clock frequency to be scaled by user (adjust speed vs power tradeoff)
may or may not have external crystal or on chip resonator)
requires time to power up and must be activated by user when precise clock required |
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Term
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Definition
Two internal reference clocks (IRC) with nominal frequencies of 32khz and 4 Mhz
the fast IRC frequency can be divided dow use FCRDIV
FLL clock- source is either 32khz IRC or OSCCLK
PLL clock- requires OSCCLK
external ref clock from XOSC |
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Term
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Definition
supports 3-32Mhz external crystals/resonator connections
supports 32kHZ crystalls
voltage and freq filtering to guarantee clock freq and stability
one clock for MCU clock system
two clocks for on chip peripherals that can work in stop modes |
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Term
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Definition
| Computer operating properly- electronic timer system that detects and recover from computer malfunctions |
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Term
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Definition
Integrated system timer in all ARM corextM controllers
simple
24bit
clear on write
decrementing
wrap on zero counter
flexible control mechanism |
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Term
| Requires an external crystal oscillattor |
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Definition
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Term
| active clock source after reset |
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Definition
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Term
| PRODUCECES a fixed 4Mhz clock |
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Definition
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Term
| HAS A VERY ACCURATE FREQUENCY |
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Definition
| OSCCLK and PLL (PLL uses OSCCLK as an input) |
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Term
| What is the maximum reload value of a counter with a 16bit count down counter with a 16Mhz clock? |
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Definition
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Term
Briefly describe the program steps needed to setup a timer
interrupt
using the SysTick timer. Show control
registers values needed to implement a 1 sec delay with SysTick clock frequency of 1.5Mz |
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Definition
0. (if timer has been used before) Stop timer by clearing (to 0) ENABLE bit (0) in SYST_CSR register.
1. Store RELOAD value to SYST_RVR register. We need RELOAD / Freq = 1 sec, thus RELOAD = 1.5*10^6= 0x16.E360
2. Clear CURRENT value by storing any value to SYST_CVR regiser (a read only register
that will clear when you write to it)
3. Set clock source to master clock/16 (1.5MHz) by clearing CLKSOURCE bit (2) in SYST_CSR register.
4. Enable interrupt by setting (to 1) the TICKINT bit (1) in SYST_CSR register.
5. Enable SysTick timer to start counting by setting (to 1) the ENABLE bit (0) in SYST_CSR register. |
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