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Memory Organization - Memory Hierarchy and Cache Memory
Computer Architecture I
58
Computer Science
Undergraduate 2
12/08/2015

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Cards

Term
Speed will depend on the clock cycle (_____) of the circuits
Definition
frequency
Term
Number of tasks completed per time unit
Definition
throughput
Term
Counts everything (disk and memory accesses, I/O, etc.)
Definition
elapsed time
Term
doesn't count I/O or time spent running other programs, can be broken up into system time, and user time
Definition
CPU time
Term
time spend executing the lines of code that are "in" our program
Definition
user CPU time
Term
number of clock cycles it takes to complete the executing of your program
Definition
processor time
Term
CPU time equation
Definition
CPU(seconds/program)=IC(instructions/program)*CPI(cycles/instruction)*Clk(seconds/cycle)
Term
CPI
Definition
cycles per instruction
Term
Calculate the CPIi, % time, and CPItotal for the following: ALU: Freq- 50%, Cycles- 1 Load: Freq- 20%, Cycles- 2 Store: Freq- 10%, Cycles- 2 Branch: Freq- 20%, Cycles- 2
Definition
0.5, 0.4, 0.2, 0.4, 33%, 27%, 13%, 27%, 1.5
Term
Principles of Computer Architecture Design: Thumb Rules
Definition
Common case fast, Principle of Locality, Concurrency/Parallelism
Term
Focus on improving those instructions that are frequently used
Definition
Common case fast
Term
Items with nearby addresses tend to be referenced close together in time
Definition
spatial
Term
Recently referenced items are likely to be referenced in the near future
Definition
temporal
Term
2 concepts of Principle of Locality
Definition
spatial, temporal
Term
Overlap the instruction execution steps
Definition
concurrency/parallelism
Term
Enhance/optimize a portion of code for application to run faster
Definition
Amdahl's Law
Term
Focus optimizations of return on _____ and code segments that take _____ time
Definition
investment, long
Term
Can read from any location by supplying address of data
Definition
random access memory
Term
Ram is packaged as a _____. Basic storage unit is a _____ (one _____ per cell). Multiple RAM chips form a _____.
Definition
chip, cell, bit, memory
Term
2 types of RAM
Definition
SRAM (Static Random Access Memory), DRAM (Dynamic Random Access Memory)
Term
Read only memories-store OS, e.g. ROM, EPROM, EEPROM, Flash, etc.
Definition
non-volatile
Term
_____ is small and/or expensive. _____ is slow and/or cheap
Definition
Fast, Large
Term
Data transferred between _____ and _____
Definition
memory, processor
Term
What does processor do while waiting for data to be transferred?
Definition
idle
Term
List the ascending order of access time for the following: main memory, register, cache, disk memory
Definition
register, cache, main memory, disk memory
Term
Most program do not access code or data uniformly
Definition
locality
Term
Levels provide _____
Definition
subsets
Term
Programs tend to reuse data and instructions near those they have used recently, or that were recently referenced themselves
Definition
Principle of Locality
Term
sum = 0;
for (i = 0; i < n; i++) {
sum += a[i];
}
return sum;
Data: Reference array elements in succession (stride-1 reference pattern)- _____ _____, Reference sum each iteration- _____ _____
Instructions: Reference instructions in sequence- _____ _____, Cycle through loop repeatedly- _____ _____
Definition
spatial locality, temporal locality, spatial locality, temporal locality
Term
Processor is (1) in _____ or (2) waits for _____
Definition
execution, memory
Term
Execution time equation
Definition
execution time=(execution cycles+memory stall cycles)*cycle time
Term
Improve performance=decrease _____ cycles
Definition
stall
Term
More stall cycles=increase in _____
Definition
CPI
Term
an ordered sequence of storage cells, each capable of holding a piece of data
Definition
memory unit
Term
_____ is size of memory: N bit address space=_____ memory locations; _____ is size of each memory location-k bits; Total memory size=_____ _____. Memory addresses go from 0 to 2N-1
Definition
Address space, 2N, k.2N bits
Term
Build large memory using several smaller memory chips (_____). CPU generates an address request, the address can be in any _____
Definition
modules, module
Term
A _____ is a collection of parallel wires that carry address, data, and control signals. Buses are typically shared by _____ devices.
Definition
multiple
Term
What do these statements describe? Gap between main memory speed and processor speed. Place a small but fast memory close to the processor.
Definition
cache
Term
Reading data/inst from memory will take _____ than 1 processor cycle
Definition
more
Term
_____ amount of fast on-chip cache memory. _____ amount of off-chip main memory. _____ disk
Definition
Small, Larger Huge
Term
On-chip cache takes _____ processor cycle. Main memory takes a number (_____) processor cycles. Disk takes _____ amount.
Definition
1, 10-50, huge
Term
Memory=_____+_____ _____
Definition
cache, main memory
Term
If data is found in cache then time=1, called a _____ _____. Else time is main memory access time, _____ _____, means read from next level
Definition
cache hit, cache miss
Term
Control unit to determine if location is in cache or not
Definition
cache controller
Term
data appears in block in upper level
Definition
hit
Term
fraction of memory access found in upper level
Definition
hit rate
Term
_____ _____ is time to access upper level which consists of _____ access time+time to determine _____/_____
Definition
hit time, RAM, hit, miss
Term
data needs to be retrieved from a block in the lower level
Definition
miss
Term
Miss Rate=1 - (_____ _____)
Definition
hit rate
Term
extra time to replace a block in the upper level+time to deliver the block to the processor
Definition
miss penalty
Term
_____ _____ _____=number of misses*miss penalty=IC*(memory accesses/instruction)*miss rate*miss penalty
Definition
memory stall cycles
Term
_____ _____ (hit ratio) h=(no. of requests that are hits)/(total no. requests)
Definition
hit rate
Term
Cost of _____ _____=hCh+(1-h)Cm
Definition
memory access
Term
JUST FINISED PAGE 13
Definition
Term
_____ _____ _____=number of misses*miss penalty=IC*(memory accesses/instruction)*miss rate*miss penalty
Definition
memory stall cycles
Term
_____ _____ (hit ratio) h=(no. of requests that are hits)/(total no. requests)
Definition
hit rate
Term
Cost of _____ _____=hCh+(1-h)Cm
Definition
memory access
Term
JUST FINISED PAGE 13
Definition
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