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A way of encoding the things being represented as a set of bits, with each bit pattern corresponding to a unique object or thing |
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Consists of both a size in bits and a representation, such as the 2's complement representation for signed integers, or the ASCII representation for English text. |
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A representation scheme that formats information in several components or fields, each with a data type. |
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Several components that make up a data structure, typically a location representation. |
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int=32 bits, char=byte, look up the rest |
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A way to order locations in memory space. It is the size of an address. |
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Just a bunch of bits that serve one purpose: to point to our stored number in memory. |
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To reading from the memory location to which the pointer we are dereferencing points to |
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Any pointer can be treated as an array, and any array can be treated as a pointer. |
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When a field points to another structure creating a link between each element in the list. |
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Repeatedly breaking each task into subtasks until we reach the desired level, usually only a machine instruction or two. |
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Look at page 5 in the Lecture notes #0. There are three types: sequential, iterative and conditional |
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Register Transfer Language (RTL) |
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A level where we obtain a pointer to the first list element by reading from M[head], the memory location to which head points. |
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Statements we know to be true |
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The condition that ends an iteration. Typically because search space is empty or middle item is one we want |
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Languages that prevent the programmer from changing the type of a given datum (variable/structure). |
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Types that are always available in the language |
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Provides the size in bytes of any type or variable. It's a built-in function within C library |
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Another name for stack frames |
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defines a structure type and/or a variable of a structure type |
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The components of a data structure |
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a listing of all of the elements of a set. |
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int, char, double, float preface a variable and set to a semicolon. |
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a container for a set of identifiers (names). A name in a namespace consists of a namespace identifier and a local name. C++ code:
std::array |
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Makes a variable defined elsewhere accessible |
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Creation of a new variable |
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Specifies what parts of a program can access the variable |
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Specifies when and where in memory the variable is stored |
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When programmer defines a variable with the same name either within scope or in a broader scope. |
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the static qualifier creates a variable local to the file. |
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A variable accessible from other files |
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automatic (stack) variable |
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Any variable declared in a compound statement and without the static qualifier, forcing the stack to allocate space whenever the enclosing function begins execution and is discarded when the function returns. |
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addition, subtraction, etc. |
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AND(&), OR(|), XOR(^), NOT(~), and left(<<) and right(>>) bit shifts |
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(==), (!=), and relative order(<,<=,>=,>) |
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Uses single equals sign (=) |
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pre- and post-increment and decrement |
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Pre-increment: ++p, --p expression produces the new, incremented value Post-increment: p++, p-- expression produces original, unincremented value |
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dereference (*) reads contents of address. address (&) reads the address |
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Addition and subtraction are defined for pointer types |
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function signature/prototype |
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Specifies the return type, name, and argument types for a function, but does not actually define the function |
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The arguments are evaluated and the resulting values are copied(usually onto the stack) when function is called |
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When the compiler changes the type for you. Aka, int to float or double. This happens prior to executing operation |
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Force conversion from one type to another. Such casts must be used with caution, as they silence many of the warnings that a compiler might otherwise generate when it detects potential problems. |
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Enables the unique definition of new types, structures, and function prototypes within header files that can be included by reference within source files that make use of them |
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Provides a text-replacement facility |
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When a system makes use of parametrized text replacement |
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Reduced Instruction Set Computing. Basically fake instruction sets used in an academic setting like LC-3 |
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Complex Instruction Set Computing. The all-powerful x86 (one instruction set to rule them all!) |
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Described using an % sign. Review the table on page 17 for Lecture Notes #1 describing the size of different registers and their basic description |
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If you want something returned as an immediate value. |
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It's the school's new mascot! Described by Prof. Lumetta as "an action where if you store a 32-bit register into memory and then look at the four bytes of memory one by one, you will find the little end of the 32 bits first, followed by the next eight bits, then the next, and finally the high eight bits of the stored value. |
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Instruction operands that DO NOT affect flags |
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Preceded by an asterix. Ex: *(%eax) means push the memory of %eax into the Extended Instruction Pointer (EIP). |
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They are pushed from right to left to allow for a variable number of parameters without requiring additional space for parameter counts or sentinels (end pointers). |
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Address requirement for moving data that is 16-bit values |
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Can only be writtne or read from even addresses |
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Address requirement for moving data that is 32-bit values |
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Require addresses that are multiples of four |
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A calling convention is used: before invoking a system call, arguments are marshaled by a staff sargent into the appropriate registers or locations in the stack. After a system call returns, any result appears in a pre-specified register. |
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Asynchronous interruptions generated by other devices, including disk drives, printers, network cards, video cards, keyboards, mice. |
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Occur when a processor encounters an unexpected |
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The code associated with an interrupt, an exception, or a system call is a form of procedure. |
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Interrupt enable Flag (IF) |
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Set in the flags register, interrupts are allowed to occur. |
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Non-maskable interrupts (NMI) |
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Used to indicate serious conditions such as parity failure in memory, critically, low energy levels in batteries, etc. and will not be addressed in great detail in our course, as most of the hardware and software mechanisms involved are nearly identical to those used for normal interrupts. |
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Interrupt Descriptor Table (IDT) |
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A single 256-entry array vector table for interrupts, exceptions, and system calls. See diagram on page 29, Lecture #2. |
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Similar to a memory address space, this space allows for a bus system that sends reads and writes of data to specific port numbers that correspond as addresses. |
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A system that separates I/O ports from memory addresses by using distinct instructions for each class of operation. |
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Allows access to device registers from same load and store instructions as are used to access memory(i.e. PUSH, POP). Requires no new instructions for I/O, but demands that a region of the memory address space be set aside for I/O. |
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A block of code that executes a set of operations that should be executed without stopping or interruption. |
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Indivisibility. The critical section cannot be divided into chunks to be read/processed. |
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Race conditions and deadlocks |
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Think of a marathon where two runners cross the finish line at once. This is what a race condition is on an a macro level. Who wins? This problem is known as a deadlock. |
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Refers to the fact that a program waiting for a lock "spins" idly in a small loop while waiting rather than going off to do other useful work or allowing other programs to use the processor. Make sure no race conditions allow a dynamically allocated spin lock to be used before it is initialized. |
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Application Programming Interface (API) |
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specification intended to be used as an interface by software components to communicate with each other. In ECE 391, we've referred to two examples: spin lock API and API's defined standard POSIX |
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acronym for "Portable Operating System Interface", is a family of standards specified by the IEEE for maintaining compatibility between operating systems. |
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Generalizes the concept of a lock to allow some fixed number of programs to enter some set of critical sections simulatanously. |
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Used with semaphores, mutex_locks to execute the read or write operation respectively. Sets semaphore to zero. |
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Sets semaphore, mutex_lock to one. Releases semaphore or mutex_lock |
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When code shares data with interrupt handlers, when a spin_lock is being held, or there's a short critical section. Multiple writers, but few readers |
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Multiple readers, few writers |
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When only one program can enter a critical section at a time, the presence of programs in the critical section is mutually exclusive. |
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When readers mosy on into the critical section, throw up a spin lock, and deprive the writer of writing abilities, possibly forever! |
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Additional piece of hardware to manage the interrupt signals and priorities |
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Programmable Interrupt controller (PIC) |
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A chip used for the interrupt controller that has 28 pins. Study Intel's 8259A PIC on page 39, Lecture #2 |
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When kernel code is otherwise only executed by programs making system calls or programs running in the kernel. |
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Function signature/prototype |
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Specifies the return type, name, and argument types for a function, but does not actually define the function. Used for linked list removal function |
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The code produced by the compiler stops evaluating operands as soon as the final result is known. |
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Allows for writers to access the datum(component/object) when no one else, readers or writers, are accessing it. Also a function, Reader/Writer locks allow for multiple readers to view critical section at once. |
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One writer can enter a critical section at any time, and only when no other readers or writers are in critical sections protected by the same reader/wrtier semaphore. A program attempting to acquire a reader/writer semaphore may yield the processor to another program. |
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Which IR has highest priority when connected to the PIC? |
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The lower-numbered IR lines have higher priority. When an IR line is selected, the lower priority IR lines in service are masked |
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End-Of-Interrupt signal (EOI) |
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The PIC removes the interrupt from its set of in-service interrupts. If an interrupt handler fails to send an EOI, the PIC continues to mask lower priority interrupts indefinitely. |
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