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Arithmetic Logic Unit (ALU) |
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performs arithmetic and logical operations in binary |
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Computer elements connected via a group of conductors |
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Small amount of very high speed RAM that holds instruction and data from primary memory that is likely to be used in the current operation, increases apparent RAM access time |
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Memory where locations can be directly addressed and the data that is stored can be altered. It is volatile; lose power = lose data. Multi-phase clock signals used |
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Data is stored in parasitic capacitance and needs to be refreshed – read and rewritten every few milliseconds. Uses a multi-phase clock signals. |
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Uses latches to store the bits does not need refreshing. Single-phase clock signals used. |
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- Non-volatile storage where locations can be directly addressed - Data can not be altered dynamically - Data remains when power is lost - Some ROMs can not be altered |
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Erasable Programmable Read Only Memories (EPROMS) and Electrically Erasable Programmable Read Only Memories (EEPROMS) |
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Other Flash type memories can be altered but slow data transfer compared to other types of memory |
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Directly addressable by the CPU and is usually RAM |
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- Non-volatile - Slower - Example Magnetic Disks |
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Must be searched from beginning. ample – Magnetic Tape Drive |
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Uses secondary memory in conjunction with primary memory to present the CPU with more virtual primary memory |
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Programmable Logic Device |
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Integrated circuit with connections or internal logic gates that can be changed through programming. Examples of PLD are Read Only Memory (ROM) and Programmable Array Logic (PAL) |
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Means to prevent one program from modifying the memory contents of another. Implemented by the Operating System or the Hardware. |
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- Run or operating state - Application or problem state (Non-privileged instruction – subset of instructions for user) - Supervisory State (Privileged instructions – System Administrator may execute) - Wait State (accessing slow memory) |
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Addressing registers within the CPU or registers in the primary memory |
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Addressing a portion of primary memory with actual address of the memory |
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Addressing all of the primary memory space |
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Adding the memory address to and index register to then address memory location |
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Internal register no need to supply the address |
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Address specified in the instruction contains final desired location |
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Increases performance by overlapping the steps of instructions. Has three Phases; Fetch, Decode, & Execute |
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Instructions perform many operations per instruction, based on taking advantage of longer fetch times |
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Simpler instruction that require less clock cycles to complete. Faster processors enable the fetch process to be done as quickly as decode and Execute |
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Processor that executes one instruction at a time |
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Processor that enables concurrent execution of multiple instructions in the same pipeline |
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Very Long Instruction Word Processor – VLIW |
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Processor in which a single instruction specifies more than one concurrent operation |
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Executes two or more programs simultaneously on a single processor |
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Executes two or more subprograms at the same time on a single processor |
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Executes two or more programs at the same time on multiple processors |
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- Block devices (write blocks of data; hard disk) - Character devices (not addressable; keyboard and printer) |
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Ready State Problem State Supervisory State Wait State |
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Direct Memory Access – DMA |
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Data is transferred directly to and from the memory bypassing the CPU |
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An external signal interrupts the normal program flow and requests service, when the service is complete the CPU restores the state of the original program, CPU can turn off interrupts |
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Machine language: Assembler – translates from assembly language to machine language. |
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Assembly language: Disassembler – translates machine language to assembly |
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Fortran, BASIC, C languages: Compiler – translates high-level language to machine code. |
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NATURAL, FOCUS, and database query languages: Decompiler – translates machine language into high-level language. |
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Prolog, LISP and other Artificial Intelligence languages: Interpreter – translates high-level language one command at time to machine code. |
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Program or set of programs that controls the resources and operations of the computer |
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O/S communicates with I/O through controller (i.e. disk controller) |
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Published specifications, subject to open review and evaluation, vulnerabilities exposed during review. |
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Vendor proprietary usually not compatible with other systems, no open review, may have unexposed vulnerabilities |
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Migration from central computing to the client server model, including desktops. |
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Execution of memory space assigned to each process. Protects from unauthorized modification and executional interference |
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Trusted Computing Base (TCB) |
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Total Combination of protection mechanisms in hardware, software and firmware |
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Separates TCB from the rest of the system |
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Must exist for user to gain protected access to the TCB |
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Hardware, firmware and software (TCB) that implements the Reference Monitor |
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System component that enforces access control of an object |
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- Mediate all access - Be protected from modification - Be verified as correct |
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Definition
1) High Mode of Operation – all users have a security clearance or authorization to access the information but not necessarily a need-to-know for all the information processed on the system (only some of the data). 2) Multi Level Operation - Permits two or more classification levels of information to be processed at the same time when all the users do not have the clearance of formal approval to access all the information being processed by the system 3) Dedicated – all users have the clearance or authorization and need-to-know to all data processed within the system. 4) Compartmented – all users have the clearance to access all the information processed by the system, but might not have the need-to-know and formal access approval. 5) Controlled – type of multilevel security limited level of trust in the systems hardware/software 6) Limited Access - minimum level of clearance is uncleared (no clearance) and sensitive but unclassified data |
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Unintended communication path between two resources that allows transfer of information in violation of security policy |
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Time of Check to Time of Use (TOC/TOU) |
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Attack that exploits the difference in time between time security applied and time that service is used |
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Allows access only by privileged users |
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Allows component of system to fail and recover |
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Processing is halted if component of system fails |
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Non critical processing is halted if component of system fails |
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Switching to duplicate or “hot” backup |
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When the TCB and software may be inconsistent and outside intervention is required |
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Trusted Network Interpretation (TNI)– Red Book |
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Addresses confidentiality and integrity in trusted computer/communications network systems |
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Term
Trusted Computer Security Evaluation Criteria – (TCSEC) |
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Definition
Part of rainbow series. Basic control objectives of Orange Book: - Security Policy - Assurance - Accountability Addresses: - Confidentiality - NOT Integrity It looks specifically at the operating system and not other issues |
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Information Technology Security Evaluation Criteria (ITSEC) |
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Definition
European Information Technology Security Evaluation Criteria. Addresses confidentiality and integrity and availability. Target of Evaluation (TOE), i.e. system to be evaluated. must have a security target – including security enforcing mechanisms and security policy. Separately evaluates functionality and assurance. |
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TCSEC, ITSEC and Canadian Trusted Computer Product Evaluation Criteria (CTCPEC) have evolved into one common criteria. Defines Protection Profile that specifies the security requirements and protections of the product to be evaluated. |
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Evaluation of technical and non-technical security features to establish how the design meets the security requirements |
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A formal declaration by a Designated Approving Authority (DAA) where a system is approved to operate in a security mode |
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- Definition – understanding of environment and architecture - Verification – Verify compliance with System Security Authorization (While evolving) - Validation - Validate compliance with System Security Authorization (final) - Post Accreditation – continuing operation |
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Types of NIACAP accreditation |
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Definition
- Site accreditation – evaluates application at self contained location - Type accreditation – evaluates application at number of locations - System accreditation - evaluates a major application or support system |
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Information Security Models |
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- Access control models - Integrity Models - Information Flow Models |
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- Access Matrix - Take-Grant - Bell-Lapadula Confidentiality - State Machine |
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Term
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Definition
Straight Forward provides access rights to subjects for objects. - Access Rights – Read, write and execute - Subject – can be a person or a program - Objects – file or storage device - Columns - are called Access Control Lists - Rows - are capability lists - Supports Discretionary Access Control - Triple - Subjects capability is defined by a triple (object, rights, random#) - The random number prevents spoofing |
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Uses a directed graph to specify the rights a subject can transfer to an object or take from another subject. |
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Confidentiality model - Developed to formalize the US Department of Defense multilevel security policy - Only deals with confidentiality does not deal with integrity or availability - Based on Government Classification – Unclassified, Sensitive But Unclassified (SBU), Confidential, Secret, Top Secret - Must have need to know - A Trusted Subject can violate the *property - Does not address client/server model - Based on State Machine Concept - Starts at secure state and transitions from one state to another. - The initial state must be secure and the transitions result in a secure state |
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Simple Security Property (ss Property) |
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Bell-Lapadula Security State meaning no reading from lower subject to higher object (No Read Up) |
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(*) Star security Property |
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Bell-Lapadula Security State meaning no writing from higher subject to lower object (No write Down) |
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Discretionary Security Property |
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Bell-Lapadula Security State that uses Access Matrix to specify discretionary access control |
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Discretionary access decisions based on data contained in the object data. |
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Discretionary access based on subject or object attributes to make these decisions (i.e. job role, earlier accesses, and file creation dates and times). |
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Weakness of Bell-Lapadula Modell |
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- Does not address covert channels - Does not address modern systems that use file sharing and server - Does not define secure state transition - Based on multilevel security does not address other policy types |
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No reading of lower object from higher subject (No Read Down) |
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No writing from lower subject to higher object (No write Up) |
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A subject at a lower level of integrity can not invoke a subject at a higher level of integrity |
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Integrity defined by three goals 1) Data protected from modification by unauthorized users 2) Data protected from unauthorized modification by authorized users 3) Data is internally and externally consistent. Developed in 1977 as an integrity add on to Bell-Lapadula - Lattice Based uses less than or equal to relation - A lattice structure is a set with a least upper bound (LUB) and a greatest lower bound (GLB) - Lattice represents a set of integrity classes (IC) and an ordered relationship - Lattice = (IC, , LUB, GUB) |
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Clark-Wilson Integrity Model |
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Contains two elements: well formed transaction and separation of duties. - Developed in 1987 for use in real-world commercial environment - Addresses the three integrity goals - Constrained Data Item (CDI) – A data Item whose integrity is to be preserved - Integrity Verification Procedure (IVP) – confirms that all CDIs have integrity - Transformation Procedure (TP) – transforms a CDI from one integrity state to another integrity state - Unconstrained Data Item – data items outside of the control area of the modeled environment - Requires Integrity Labels |
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- Each object and subject is assigned security class and value; info is constrained to flow in directions that are permitted by the security policy. - Based on state machine and consists of objects, state transitions and lattice (flow policy) states. - Object can be a user - Each object is assigned a security class and value - Information is constrained to flow in the directions permitted by the policy |
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Actions of group A using commands C are not seen by users in Group B using commands D |
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When smaller systems are combined they must maintain the component system security properties |
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1) Cascading – one systems input is the output of another 2) Feedback – one systems output is input to another system and returned as input to the first system 3) Hookup – a system that communicates with another system and external entities |
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- Intersection - Union - Difference |
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