Term
| True or False: The ARM Condition Code Register is always set when the ARM's ALU is used for operation |
|
Definition
|
|
Term
| True or False: Literal addressing and immediate addressing are exactly the same thing |
|
Definition
|
|
Term
| True or False: The ARM Stack Pointer can only grow to higher memory address locations |
|
Definition
|
|
Term
| True or False: The PUSH {r0-r15} instruction will restore the valise of the registers that were previously saved onto the stack |
|
Definition
|
|
Term
| True or False: The ARM assembly does not support the direct addressing mode |
|
Definition
|
|
Term
| True or False: Adding two 64-bit integers in the ARM requires the use of the ADC assembly instruction |
|
Definition
|
|
Term
| True or False: The ARM assembly integer division instruction results in a quotient and remainder results in two different registers |
|
Definition
|
|
Term
| True or False: All of the ARM's 16 registers can be used for any purpose by the assembler programmer |
|
Definition
|
|
Term
| True or False: ADD r7, r0, r9, LSL #2 is a valid ARM Thumb instruction |
|
Definition
|
|
Term
| True or False: When the activation record is created during program run-time it remains allocated until the program terminates |
|
Definition
|
|
Term
| True or False: A stack frame and a stack pointer are exactly the same thing |
|
Definition
|
|
Term
| True or False: In the ARM the stack pointer always points to the top of the stack |
|
Definition
|
|
Term
| True or False: One of the steps in interrupt handling involves the saving and restoring of the ARM Current Processor Status Register (CPSR) |
|
Definition
|
|
Term
| True or False: In general, the processing of an interrupt is no different than making a call to a subroutine or function |
|
Definition
|
|
Term
| True or False: One of the major design considerations of the ARM Thumb is lower power consumption of the processor |
|
Definition
|
|
Term
| True or False: The purpose of an assembler is to take human written assembly code and start the process to turn it into code that can be executed by the target CPU |
|
Definition
|
|
Term
| Explain the purpose/use of the PC. |
|
Definition
| The Program Counter contains the address of the next instruction to execute (r15) |
|
|
Term
| Explain the purpose/use of the MAR |
|
Definition
| The Memory Address Register holds the address the is being read or written to |
|
|
Term
| Explain the purpose/use of the MBR |
|
Definition
| The Memory Buffer Register holds the data that is being read or written |
|
|
Term
| Explain the purpose/use of the IR |
|
Definition
| The Instruction Register contains the current instructions that are being executed |
|
|
Term
| Explain the purpose/use of the CCR (CPSR) |
|
Definition
| The Current Processor Status Register contains the flags for N, Z, C, and V, as well as the bits for Thumb, interrupt (FIQ, IRQ), and mode. |
|
|
Term
| Explain the purpose/use of the LR |
|
Definition
| The link register contains the PC value when the BL statement is executed |
|
|
Term
| Explain the purpose/use of the SP |
|
Definition
| The Stack Pointer (r13) in Arm always points to the top of the stack |
|
|
Term
|
Definition
| It's the observation that the number of transistors on a chip double every 1.5 to 2 years |
|
|
Term
|
Definition
| As transistors get smaller, their power density remains the same |
|
|
Term
| True or False: Another term for Dennard Scaling is MOSFET scaling |
|
Definition
|
|
Term
|
Definition
| States that the larger the fraction of instructions that have can run in parallel, the faster the machine |
|
|
Term
| How can Branch Target Identification be used to mitigate jump oriented programming attacks? |
|
Definition
| This can be used when the program jumps to a function/subroutine. During this jump, if the hacker can get that function's address, he/she can replace it with malicious code. With BTI, after the jump, the first line has to be a BTI instruction, otherwise the program will not continue. |
|
|
Term
| What are the 5 stages of the standard 5-stage pipeline? |
|
Definition
1. Instruction fetch- get instructions
2. Instruction decode- decode instructions
3. Operand fetch- get the operands referenced in the decoded instructions
4. Execute- run the operation
5. Operand store- save the results of the execution in the designated operand |
|
|
Term
| In Arm, a word is _ bytes whereas in thumb it is __ 2 bytes |
|
Definition
Arm word = 4 bytes
Thumb mode word = 2 bytes |
|
|
