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'Basic Input/Output System' chip. Maintains hardware connected to the Motherboard. BIOS comes before the system - first thing to go on. A major function of the BIOS is to perform a process known as 'power-on self-test (POST). |
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'Power-on-self-test' POST is a series of system checks performed by the system BIOS. It verifies the integrity of the BIOS itself. Also confirms size of primary memory and analyzes and catalogs other forms of hardware such as buses and boot devices as well as manages the passing of control to the specialized BIOS routines above. Finally, once POST has completed successfully, the BIOS selects the boot device highest in the configuration boot order and executes the master boot record (MBR). |
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Processor and memory slots at right angles to the expansion cards; in line with the fan output. The primary motherboards today. |
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Follows same principle of ATX. for smaller boxes – less power. |
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'New Low-Profile Extended'. Expansion slots (ISA, PCI and etc.) sideways on a special riser card to use the reduced vertical space optimally. Not common since Pentium processors and Accelerated Graphics Port (AGP) |
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Accelerated Graphics Port for video cards now being supplanted by PCI Express adapters. |
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'Balanced Technology Extended' – Intel started it in 2004. By lining up all heat-producing components between air intake vents and the power supply's exhaust fan it is cooled properly by passive heat sinks. |
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A heat sink is a block of aluminum or other metal with veins throughout, that sits on top of the CPU, drawing its heat away. |
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A common collection of signal pathways over which related devices communicate within the computer system |
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Northbridge and Southbridge |
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Manages high-speed peripheral communications. Responsible primarily for communications with integrated video using AGP (Accelerated Graphics Port) and PCI Express. |
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Responsible for providing support to onboard slower-peripherals (PS/2, Parallel, IDE... other expansion slots) |
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PCI (Peripheral Component Interconnect) Expansion Slots – usually white and 3 inches long. In Pentium or higher. Operate at 33 or 66 MHz over a 3 bit channel resulting in data rates of 133 and 266 Mbps. |
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'Peripheral Component Interconnect Express' Designed to replace AGP and PCI (Peripheral Component Interconnect Express). It uses concept of lanes which are the switched point to point signal paths betseen any two PCIe components. |
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'Audio Modem Riser' Expansion slots |
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Expansion Slots – 'Communcations and Networking Riser' a replacement for Intel's AMR slots. |
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'Duel inline memory modules – 168, 184, 240 pin configurations |
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FORM FACTOR OF RAM - Single inline memory module. MEMORY CHIPS ON ONE SIDE - PINS ON BOTH SIDE. |
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alternatively known as the main board, system board |
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used for connecting some keyboards and mice |
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Serial ATA, or SATA computer bus, is a storage-interface for connecting host bus adapters to mass storage devices such as hard disk drives and optical drives. |
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The bottom socket is Socket T or Socket LGA 775 and has spring-loaded pins in the socket and a grid of lands on the CPU |
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The top socket or socket 462 and has holes to receive the pins on the CPU |
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basically flat and have several rows of holes or pins arranged in a square. The top socket is known as Socket A (socket 462). The bottom socket is Socket T or Socket LGA 775 and has spring-loaded pins in the socket and a grid of lands on the CPU. |
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'Integrated Drive Electronics' also called ATA (Advanced Technology Attachment) |
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Musical Instrument Digital Interface |
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a cable form factor – serial attachments |
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Universal serial bus, to establish communication between devices and a host controller: USB 1.0 Throughput 1.5 Mbs – Max Speed 12 Mbit/s / USB 2.0 480 MBS. USB devices are linked in series through hubs. There always exists one hub known as the root hub, which is built into the host controller. So-called sharing hubs, which allow multiple computers to access the same peripheral device(s), also exist and work by switching access between PCs, either automatically or manually. USB device communication is based on pipes (logical channels). Pipes are connections from the host controller to a logical entity on the device named an endpoint |
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1394 Firewire Form Factor. FireWire is Apple's name for the IEEE 1394 High Speed Serial Bus. |
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any software that is encoded in hardware, usually a read-only memory (ROM) chip. And can be run without extra instructions from the operating system. For example, the BIOS routine which is burned in to a chip. |
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Small Computer System Interface |
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INTEL and Advanced Micro Devices (AMD) |
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Single edge contact cartridge form factor = a PGA (Pin Grid Array) - type socket on a special expansion card. |
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Staggered PGA (Pin Grid Array). A higher pin count per area than PGA. |
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(HTT) Intel's Hyper-Threading Technology. A form of simultaneous multithreading (SMT) – they appear to the operating system to be two processors. |
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the bus that carries data between the CPU and the northbridge. |
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is a computer bus used to connect the CPU to CPU cache memory, usually L2. If a design utilizes it along with a front-side bus (FSB), it is said to use a dual-bus architecture, or in Intel's terminology Dual Independent Bus (DIB) architecture. |
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Parity Checking, Error checking and Correcting (ECC), Single- and double-sided memory, Single- and dual-channel memory. |
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A parity bit is a bit that is added to ensure that the number of bits with the value one in a set of bits is even or odd. Parity bits are used as the simplest form of error detecting code. There are two variants of parity bits: even parity bit and odd parity bit. When using even parity, the parity bit is set to 1 if the number of ones in a given set of bits (including the parity bit) is even. When using odd parity, the parity bit is set to 1 if the number of ones in a given set of bits (including the parity bit) is odd. In other words, an even parity bit will be set to "1" if the number of 1's + 1 is even, and an odd parity bit will be set to "1" if the number of 1's +1 is odd. |
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Single- and double-sided memory |
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treated by the system as two separate memory modules. Double-sided memory is treated by the system as two separate memory modules. Motherboards that support such memory have memory controllers that must switch between the two “sides” of the modules and, at any particular moment, can only access the side they have switched to. |
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dynamic random access memory |
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'Communications and Networking Riser' a replacement for Intel's AMR slots. |
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Synchronous dynamic random access memory - Shares a common clock signal with the computer's system-bus clock. Which provides the common signal that all local-bus components use for each step that they perform. The clock is used to drive an internal finite state machine that pipelines incoming instructions. This ties SDRAM to the speed of the FSB hence the processor. |
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single data rate - accepts one command and transfer one word of data per clock cycle. Using a parallel data-bus width of 8 bytes, a 100 MHz clock signal produces 800MBps. These modules are referred to as PC100, named for the true FSB clock rate they rely on. |
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Double data rate synchronous dynamic random access memory (DDR SDRAM) - It achieves nearly twice the bandwidth of the preceding single data rate (SDR) SDRAM by double pumping (transferring data on the rising and falling edges of the clock signal) without increasing the clock frequency. |
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computer bus operating with double data rate transfers data on both the rising and falling edges of the clock signal also known as dual-pumped, and double transition. |
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– Like DDR uses both sweeps of the clock signal for data transfer. Example = PC2-5333 modules. It supersedes the original DDR SDRAM specification and the two are not compatible. In addition to double pumping the data bus as in DDR SDRAM, (transferring data on the rising and falling edges of the bus clock signal), DDR2 employs an I/O buffer between the memory and the data bus so that the data bus can be run at twice the speed of the memory clock. The two factors combine to achieve a total of 4 data transfers per memory clock cycle. With data being transferred 64 bits at a time, DDR2 SDRAM gives a transfer rate of (memory clock rate) × 2 (for bus clock multiplier) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of bits/byte). Thus with a memory clock frequency of 100 MHz, DDR2 SDRAM gives a maximum transfer rate of 3200MB/s. |
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double-data-rate three synchronous dynamic random access memory. The primary benefit of DDR3 is the ability to transfer at twice the data rate of DDR2 (I/O at 8× the data rate of the memory cells it contains), thus enabling higher bus rates and higher peak rates than earlier memory technologies. |
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Static Random Access Memory - does not need to be periodically refreshed. SRAM is more expensive, but faster and significantly less power hungry (especially idle) than DRAM. It is therefore used where either bandwidth or low power, or both, are principal considerations. |
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Read-only memory, mainly used to distribute firmware (software that is very closely tied to specific hardware, and unlikely to require frequent updates). Non-volatile. The system ROM enables the system to BOOT. |
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term often used to denote the fixed, usually rather small, programs and data structures that internally control various electronic devices. Firmware is typically involved with very basic low-level operations in a device, without which the device would be completely non-functional. Simple firmware typically resides in ROM or OTP/PROM (programmable read only memory), while more complex firmware often employs flash memory to allow for updates. |
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4 form factors for primary memory |
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DIMM RIMM SODIMM MicroDIMM |
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64-bit memory modules used as a package for the SRAM family: SDR, DDR (total 184 pins and a single keying notch), DDR2 (total 240pins and a single keying notch), and DDR3 (total 240 pins and a single keying notch – the notch is in a different place than DDR2 making it physically incompatible as well as electrically incompatible). |
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For laptops, using a small outline DIMM. |
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Smaller RAM form factor. 50% smaller than a SODIMM. For ultralight and portable subnotebooks. |
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on the motherboard is known as external cache because it is external to the processor |
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Level 1 Cache is internal cache because it is built into the processor's silicon wafer. |
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the smallest units of storage on the discs' platters. Magnetic-drive sectors commonly store only 512 bytes of data each. Sectors are created only after tracks are drawn magnetically around the surface of the platters. Sectors are then delineated within each of the tracks. |
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Peripheral Component Interconnect |
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Musical Instrument Digital Interface. Modern MIDI controllers use 5-pin DIN connectors. |
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Allows switching between Keyboard, Video, and mouse. Have multiple systems attached to the same keyboard, monitor, and mouse. |
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Hal.dll is the core of Windows' Hardware Abstraction Layer, which allows applications to access devices in the system without knowledge of the specific protocol used by any one device. |
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Random Access Memory. Works with Northbridge which controls the speed – applications – everything. |
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Whenever referring to RAM referring to DRAM. Always refreshing itself to retain memory – its refresh signal. |
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(Nickel Cadmium) Battery known for relatively low energy density compared to other batteries. Provides lower recharge cycles. (more recharged faster battery dies). Advantages to other batteries: more difficult to damage than other batteries, typically last longer, in terms of number of charge/discharge cycles, smaller and lighter than a comparable lead-acid battery. |
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Creates a chemical memory. Has a faster discharge rate. Does not develop as much of a memory as NiCd batteries and have a higher energy density. Common AA and AAA cells (penlight-size) NiMH batteries have nominal charge capacities (C) ranging from 1100 mAh to 2900 mAh at 1.2 V, usually measured at a discharge rate of 0.2×C per hour. |
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longer life spans than NiCD/NiMH. Life span 2- 3 years. Maximum of 500 recharge cycles. Because of energy density, Li-Ion is the preferred chemistry for batteries designed to power laptops and other portable computing devices. |
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Lightweight. Li-poly batteries are also gaining ground in PDAs and laptop computers, such as Apple's MacBook, MacBook Pro, and Macbook Air, Amazon's Kindle, Lenovo's Thinkpad X300 and Ultrabay Batteries. |
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Advanced Configuration and Power Interface In BIOS supports ACPI which defines common interfaces for hardware recognition and configuration and power management. ACPI is an attempt to consolidate and improve upon existing power and configuration standards for hardware devices. Takes over and has exclusive control of all aspects of power management and device configuration responsibilities. The ACPI specification defines the following seven states (so-called global states) which an ACPI-compliant computer system can be in: GLOBAL STATES 1. G0 (S0) Working – The normal working state of a computer – assumes all is working at full power. 2. G1 Sleeping subdivides into the four states (sleep modes) S1 through S4. a. S1: All processor caches are flushed, and the CPU(s) stop executing instructions. Power to the CPU(s) and RAM is maintained; devices that do not indicate they must remain on may be powered down. b. S2: The CPU is powered off. c. S3: Commonly referred to as Standby, Sleep, or Suspend to RAM. RAM is still powered. However, if power is lost then all of the information being held in RAM is gone. d. S4: Hibernation or Suspend to disk. All content of main memory is saved to non-volatile memory such as a hard drive, and is powered down. 3. G2 (S5) Soft Off-- G2, S5, and Soft Off are synonyms. G2 is almost the same as G3 Mechanical Off, but some components remain powered so the computer can "wake" from input from the keyboard, clock, modem, LAN, or USB device. 4. G3 Mechanical Off: The computer's power consumption approaches close to zero, to the point that the power cord can be removed and the system is safe for disassembly (typically, only the real-time clock is running off its own small battery). Processor states The CPU power states C0-C3 are defined as follows: • C0 is the operating state. No power is being saved. • C1 (often known as Halt) is a state where the processor is not executing instructions, but can return to an executing state essentially instantaneously. Some processors, such as the Pentium 4, also support an Enhanced C1 state (C1E) for lower power consumption. • C2 (often known as Stop-Clock) is a state where the processor maintains all software-visible state, but may take longer to wake up. • C3 (often known as Sleep) is a state where the processor does not need to keep its cache coherent, but maintains other state. Some processors have variations on the C3 state (Deep Sleep, Deeper Sleep, etc.) that differ in how long it takes to wake the processor. DEVICE STATES These apply only to peripheral devices: • D0 Fully On is the full operating state • D1 and D2 = intermediate power states – neither uses full power and each device specifically defines its own D1 and D2 states. • In D3 Off, the device is completely powered down and not responsive. |
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For laptops – converts AC-power input to DC output. |
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For laptops – allows user to plug the laptop into the power source such as a cigarette lighter. |
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(Cathode ray tube) An electron gun shoots a beam of electrons toward the back side of the monitor screen. Colour CRTs use three guns – one for each: red, green, blue image components. Scans left to right and top to bottom in a raster pattern to create the image. The back of the screen is coated with special chemical dots called phosphors that glow when electrons strike them. |
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Dot Pitch is the measurement between the same spot in two vertically adjacent dot trios. It is a measure of the size of a triad plus the distance between the triads. |
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Degaussing is the reduction of the magnetic field of an object. |
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The component of a bubble-jet printer that moves back and forth during printing. |
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cyan, magenta, yellow, and black |
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